Forum Post: RE: ADRV9008-1 RF Receiver with the Xilinx Kintex UltraScale FPGA using the JESD204B protocol Hi Rajaseharan , Please take a look at this thread (+) Reference Project for KU115 with ADRV9008-1 - Q&A - FPGA Reference Designs - EngineerZone and tagging danmois for Vitis flow. Best regards, Bianca
https://ez.analog.com/fpga/f/q....-a/593538/adrv9008-1